It is common for microprocessors with complicated macroarchitectures, commonly referred to as complicated instruction set computer (CISC) macroarchitectures—a popular example being the x86 macroarchitecture, to employ drastically different microarchitectures internally, commonly referred to as reduced instruction set computer (RISC) microarchitectures. Such microprocessors translate each macroinstruction of their macroinstruction set specified by the program into one or more simpler microinstructions that perform the necessary constituent operations within the microprocessor to achieve the semantic of the macroinstruction.
A macroinstruction type that is very frequently executed by programs is a store macroinstruction. A store macroinstruction instructs the microprocessor to store data from a register within the microprocessor to a memory location specified by the store macroinstruction. An example of a store macroinstruction is an x86 MOV macroinstruction, such as a MOV [AX+BX], CX instruction, which instructs the microprocessor to move the contents of the CX register to the memory location whose address includes the sum of the AX and BX registers. Because store macroinstructions are very frequently executed by programs, there is a need to enable a microprocessor to execute store macroinstructions faster.